1. Field of the Invention
The present invention relates to the design of computer systems that support references to objects defined within an object-oriented programming system. More specifically, the present invention relates to a method and an apparatus that avoids inconsistencies between multiple translators, which translate object identifiers into corresponding physical addresses in an object-addressed memory hierarchy.
2. Related Art
As object-oriented programming languages become more widely used, computer systems are being designed to manipulate objects more efficiently. In particular, some proposed object-addressed memory hierarchies include object caches that facilitate lookups for object-addressed cache lines (“object cache lines”) based on location-independent object identifiers (OIDs) without having to first translate the OIDs into corresponding physical addresses.
When object-addressed cache lines are eventually written out to physical memory, they are typically mapped to actual physical address locations by a translator, which is interposed between one or more object caches and physical memory. This translator intercepts cache misses for object cache lines and converts reads or writes to objects into reads or writes to corresponding physical memory locations.
In some systems, it is desirable to provide multiple translators that work together to perform the translations. For example, it may be advantageous to integrate a translator into the same semiconductor die as an associated processor. Hence, if such a system includes multiple processors on multiple semiconductor dies, the system will include multiple translators.
If there exist multiple translators, coherence problems can potentially arise between the translators. For example, if two translators process an eviction for the same cache line at the same time, it is possible for the two translators to concurrently generate inconsistent translations for the same object cache line.
Hence, what is needed is a method and an apparatus that avoids inconsistencies between multiple translators in an object-addressed memory hierarchy.